Copyright(C) 1994,1995,1996,1997 Terumasa KODAKA , Takeshi KONO
■EGC
Target Models equipped with V30HL, V33A, 80286 or higher CPU
Explanation o EGC (Enhanced Graphic Charger) is a circuit for speeding up the PC-9800's
graphic VRAM drawing, and is upwardly compatible with GRCG (Graphic Charger).
It is inserted between the CPU and VRAM, or GDC and VRAM, and performs various
logical operations on the data written to VRAM. It is also possible to access
multiple planes simultaneously and shift data bit by bit.
o All EGC registers can be changed only when I/O 006Ah is set to EGC extended
mode and I/O 007Ch bit 7=1.
o The PC-9801NV is equipped with an EGC circuit, but it is normally masked and
cannot be used. If you execute OUT EE8Eh,00h and set 0000:054Dh bit 6=1, EGC
will be available only when resume is OFF. PC-9801NS/E･NC cannot use EGC when
resume is ON.
u When the CPU draws via EGC, it must access 16 bits. Even on models where VRAM is
connected to a 32-bit local bus, EGC can only process in 16-bit units.
o List of I/O ports used by EGC
------------+-------+-----+-----------------------------------------------
I/O address | width | R/W |content
------------+-------+-----+-----------------------------------------------
04A0h | WORD | W | EGC register 1 write
04A2h | WORD | W | EGC register 2 write
04A4h | WORD | W | EGC register 3 write
04A6h | WORD | W | EGC register 4 write
04A8h | WORD | W | EGC register 5 write
04AAh | WORD | W | EGC register 6 write
04ACh | WORD | W | EGC register 7 write
04AEh | WORD | W | EGC register 8 write
------------+-------+-----+-----------------------------------------------
Related 0000:054Dh bit 6
I/O EE8Eh
I/O 006Ah - 04h,05h
I/O 006Ah - 06h,07h
I/O 007Ch bit 7
I/O 04A0h
Name EGC register 1 write
Chip EGC
Function
[WRITE]
bit 15~8: Unused (always set to FFh)
bit 7~4: P7EN#～P4EN#■[PC-H98 256 color mode only]
bit 3~0: P3EN#～P0EN#
1=Disable writing to plane
0=Enable writing to plane
[READ]
Read setting value (PC-H98, PC-98GS only)
Description o Set the active plane. Set the bit corresponding to the plane that allows writing to 0.
o bits 7 to 4 are valid only in 256 color mode of PC-H98.
u On PC-H98 and PC-98GS, you can read the setting values by reading this port.
I/O 04A2h
Name EGC register 2 write
Chip EGC
Function
[WRITE]
bit 15: unused (always 0)
bit 14,13: FGC,BGC
11b=Setting prohibited
10b=foreground color
01b=Background color
00b=pattern register
* Select the data to be assigned to the ROP P input
bit 12: unused (always 0)
bit 11~8: Lead plane
0111b=VRAM plane #7 ■ [Only when PC-H98 256 color board is installed]
0110b=VRAM plane #6 ■ [Only when PC-H98 256 color board is installed]
0101b=VRAM plane #5 ■ [Only when PC-H98 256 color board is installed]
0100b=VRAM plane #4 ■ [Only when equipped with PC-H98 256 color board]
0011b=VRAM plane #3
0010b=VRAM plane #2
0001b=VRAM plane #1
0000b=VRAM plane #0
bit 7~0: Unused (always set to FFh)
[READ]
* Setting value reading (PC-H98, PC-98GS only)
Description o Specify the data to be assigned to the P input of ROP.
o Specify the plane from which EGC will read.
u On PC-H98 and PC-98GS, you can read the setting values by reading this port.
Related I/O 04A6h,04ACh
I/O 04A4h
Name EGC register 3 light
Chip EGC
Function
[WRITE]
bit 15,14: unused (always set to 00b)
bit 13: Compare read
1=don't
0=Yes
* Compare read is a function that compares the data of all planes and the
foreground color for each dot position when reading VRAM, and returns 1
if they match, and 0 if they do not match.
bit 12,11: Light source
11b=Not configurable
10b=Write the contents of the pattern register
01b=Write the result of raster operation
00b=write CPU data
bit 10: Read source
1=Shifter input is CPU write data
0=Shifter input is graphics VRAM data
* Select the data to be assigned to the EGC S input
bit 9~8: Register load
11b=Not configurable
10b=Load VRAM data before being written when writing VRAM
01b=Load VRAM data into pattern register when reading VRAM
00b=Do not change pattern register
bit 7~0: ROP register
Shifter 11110000
Destnation 11001100
PatternReg 10101010
--------------------------------------------------------
ROP code (example) 11110000=VRAM transfer
00001111=VRAM inversion transfer
11001100=NOP
00110011=VRAM inversion
11111111=VRAM Fill
00000000=VRAM erase
10101010=Pattern fill
01010101=Pattern Reverse Fill
[READ] None
Explanation o Define EGC ROP processing.
Related I/O 04A6h
I/O 04A6h
Name EGC register 4 write
Chip EGC
Function
[WRITE]
■[When FGC=0 and BGC=0]
bit15~0: 0
■[When FGC=1 or BGC=1]
bit15~8: 0
bit 7~4: Foreground color (when equipped with PC-H98 256 color board)
bit 3~0: Foreground color
[READ] None
Description o Specify the foreground color.
o When assigning a pattern register to the P input of ROP, you must specify 0000h to this port.
Related I/O 04A2h bit 14,13
I/O 04A8h
Name EGC register 5 write
Chip EGC
Function
[WRITE]
■[When FGC=0 and BGC=0]
bit15~0: 0
■[When FGC=1 or BGC=1]
bit15~0: Mask register
* Rewriting bits set to 1 is ignored.
[READ] None
Description o Set the mask register.
o When assigning a pattern register to the P input of ROP, you must specify 0000h to this port.
Related I/O 04A2h bit 14,13
I/O 04AAh
Name EGC register 6 light
Chip EGC
Function
[WRITE]
■[When FGC=0 and BGC=0]
bit15~0: 0
■[When FGC=1 or BGC=1]
bit15~8: 0
bit 7~4: Background color ■ (When equipped with PC-H98 256 color board)
bit 3~0: Background color
[READ] None
Description o Specify the background color.
o When assigning a pattern register to the P input of ROP, you must specify 0000h to this port.
Related I/O 04A2h bit 14,13
I/O 04ACh
Name EGC register 7 light
Chip EGC
Function
[WRITE]
bit 15~13: 000b
bit 12: DIR
1=Count bits in the direction of ← (bit descending order)
0=Count bits in the direction of → (bit ascending order)
bit 11~8: 0000b
bit 7~4: Destination bit address
bit 3~0: Source bit address
[READ] None
Description o Controls the shifter.
o Shifter allows you to shift input data bit by bit.
Related I/O 04AEh
I/O 04AEh
Name EGC register 8 write
Chip EGC
Function
[WRITE]
bit 15~12: 0
bit 11~0: Bit length (0～4095)
[READ] None
Description o Controls the shifter.
o Set the bit length of the data handled by the shifter in this port. Normally, when using EGC, VRAM performs 16-bit access, so specify 000Fh for this port.
Related I/O 04ACh